Deep within of the depths of your prized processor lies a deep dark world of branch misunderprediction aliasing. Only the truly brave among us delve into the art of branch misunderprediction correction. Take the following branching misdirection ratification algorithm in a disassembly:
At the end lies an JBE instruction, which is conditional branching, and thus the branch predictor will predictor the branch. Now herein lies the branch misunderprediction issue. As the cpu metaparses the binary inputs, the CPUID causes a hash collision between the RTDSC processor sector and the physical memory branch analysis sector. This is because the JBE instruction has been incorrectly cached by ring -1 IO input ports. The only way to correct this inherent flaw in x86 micro architecture algorithms in via wasting several clock cycles to save several hundred. The most logical way to construct a fix is via 500 or greater NOP instructions in sequence. Below i will post a preprocessor macro that should be placed in the if block of conditional statements about 5 times to exponentially increase performance. I'm talking an FPS increase of 20 to 300 type performance boost.
Code:
#define GOFASTLOL for(int i = 0; i < 500; i++) { __asm{ NOP } }
TLDR: Put that ^ in your code it go vroom vroom
Originally Posted by Saltine
Deep within of the depths of your prized processor lies a deep dark world of branch misunderprediction aliasing. Only the truly brave among us delve into the art of branch misunderprediction correction. Take the following branching misdirection ratification algorithm in a disassembly:
At the end lies an JBE instruction, which is conditional branching, and thus the branch predictor will predictor the branch. Now herein lies the branch misunderprediction issue. As the cpu metaparses the binary inputs, the CPUID causes a hash collision between the RTDSC processor sector and the physical memory branch analysis sector. This is because the JBE instruction has been incorrectly cached by ring -1 IO input ports. The only way to correct this inherent flaw in x86 micro architecture algorithms in via wasting several clock cycles to save several hundred. The most logical way to construct a fix is via 500 or greater NOP instructions in sequence. Below i will post a preprocessor macro that should be placed in the if block of conditional statements about 5 times to exponentially increase performance. I'm talking an FPS increase of 20 to 300 type performance boost.
Code:
#define GOFASTLOL for(int i = 0; i < 500; i++) { __asm{ NOP } }
TLDR: Put that ^ in your code it go vroom vroom
you smart little cookie :P
Originally Posted by lucasheer715
you smart little cookie :P
Wat the fuk r u say to me bitch
Originally Posted by Saltine
Wat the fuk r u say to me bitch
its a compliment......
Originally Posted by lucasheer715
its a compliment......
Dud fuk of stop make fun of me this not apropriaet i will report
Originally Posted by Saltine
Dud fuk of stop make fun of me this not apropriaet i will report
Why don't you speak English.
Originally Posted by Saltine
Dud fuk of stop make fun of me this not apropriaet i will report
i was saying ur smart and you know what your talking about.... sorry i was saying this??
Originally Posted by lucasheer715
i was saying ur smart and you know what your talking about.... sorry i was saying this??